"Spaceborne L Band High Efficiency 65W SSPA Demonstrator for Navigation and Radar Applications"
Rochette, S.1; Villemazet, J.-F.1; Plaza, A.1; Vendier, O.1; Drevon, C.1; Cazaux, J.-L.1; Le Gallou, N.2; Fellon, P.3; Favede, L.3; Sommet, R.4; Xiong, A.4; Gasseling, T.5; Charbonniaud, C.5; Massiot, M.6
1THALES ALENIA SPACE FRANCE; 2ESTEC; 3UMS; 4XLIM; 5AMCAD ENGINEERING; 6EGIDE
In the frame of space applications, the power amplification functionality with compliant thermal and DC power supply managements remains highly challenging. Thus, the ever higher RF power requirement involves to explore optimum technological solutions in both the active components and the power packaging fields for electrical and thermal efficiency enhancement. Thanks to the ESA support in the frame of a TRP project, THALES ALENIA SPACE FRANCE has developed a fully optimized L band HPA module demonstrator with a targeted RF power of 65W in CW and 72W in pulsed condition with an associated efficiency of 60% while insuring ECSS compliant junction temperature in the operating area.
The HB20S high power GaAs HBT process from UMS has been selected as the core technology for the HPA module. The transistor topology (emitter periphery, size of fingers and thermal drain thickness) has been optimized in order to insure the power handling, the thermal dissipation and soldering compatibility with good electrical and mechanical robustness. Special attention has been paid on the thermal management of the active device in its representative packaging environment. Thus a thorough thermal analysis by simulation/measurement of the whole structure has been performed which has allowed to determine the contribution of both the transistor and the packaging to the junction temperature value.
Once manufactured, the transistor devices have been submitted to an accurate characterization campaign including multi-temperature pulsed IV and S parameters measurements, multi-harmonic load-pull tests for high signal performance evaluation, and specific device testing for thermal impedance determination. Leaning on this dataset, a non linear electro-thermal model has been developed and validated. In particular, the specific thermal circuit model offers the possibility to dissociate the contribution of the transistor and its mounting structure including their time constants, in order to be able to assess the relative share in the temperature elevation of each layer and to be able to consider different types of packaging. The dynamic thermal modelling is of particular interest for applications involving pulsed or digitally modulated signals.
The HPA design has been performed and impedances at the 2nd harmonic have been optimized to synthesize the target obtained by load-pull measurements. Matching networks based on high permittivity substrates have allowed to reach both the challenging impedance values but also the strong layout integration constraints due to the limited amount of space available in the package. This fully hermetic package is subject to a new development leaning on the use of highly dissipative Copper Diamond material in order to reach the stringent ECSS maximum junction temperature requirements. The optimization of both DC and RF feedthroughs represents also a challenge in order to meet the targeted electrical performance. With a 14V supply voltage, a simulated 60 to 70W RF output power with associated 59% minimum PAE has been obtained in the full [-20 ; +50]°C temperature range while insuring a thermal management compatible with the specified maximum 110°C junction temperature over a 80MHz frequency band being suitable for both Navigation and Radar applications.
Breadboards have also been manufactured using only the elementary HBT power cells, covering S-band application and have demonstrated very good measured performance with 5W RF output power associated to 65-68% efficiency, which gives good confidence that the very good performance obtained in simulation for the 65W L-band module will be achieved. This last is being manufactured at the time of writing the abstract. Breadboard results shall be exhibited during the presentation if available.